Comments can be placed in makefiles by starting the line with #. Make ignores any lines that begin with a #. It is a good idea to comment your makefile listing its name, creator and date of relevant updates. Rules may be commented if they are complicated or uncommon.

To create a rule, one starts by creating the dependency line. The target files are listed starting in column 1, with a space between target files. A colon is then placed in the line and any source files are listed, separated by a space. Order is not important. If no source files are defined, then the system assumes it will depend on a compiler or assembler source code file to make the target file (This is referred to as an implied dependency.).

EXAMPLE:
total:main.o total.o
(the executable file named total is made from the two object files main.o and total.o)

The action line is then created on the line directly following the dependency line. The action line must be one tab from the left margin. The action(s) are then listed in the order they are to be executed.

EXAMPLE:
[tab]cc -o total main.o total.o
(cc is the c compiler, -o is the option to create object files, total is the name of the executable to be made from the two object files listed after it. This is the same command instruction that you could give the system at the command prompt.)

Additional action lines can be made in the same manner and will be for the same dependency line. Make will consider that rule complete when it reaches the first line that does not begin with a [tab] or a # sign. If an action line is too long, a \ symbol can be added at the end of a line to indicate the rest of the commands are continued on the next line. The @ symbol is commonly seen at the beginning of an action lines and means that the action line itself is not be be echoed on the screen as it is executed.

Macros are commonly used in makefiles to decrease the amount of typing required. A macro definition starts with a variable name (in capital letters) followed by an equal sign then followed by the string of commands the macro will replace. If the line is long, it can be continued to the next line by adding a \ at the end of the line.

EXAMPLE:
DESTDIR = /home/jkabara/public/courses/i2550/source_code

A macro is invoked by using the form $(macro_name) or ${macro_name}. In the following example, the macro from the previous example is part of another macro.

EXAMPLE:
LIBDIRS = -L$(DESTDIR)/lib
[TAB]which is the same as:
LIBDIRS = -L/home/jkabara/public/courses/i2550/source_code/lib

Rules can also be created to automate cleaning of directories after one has finished compiling and testing programs. In the following example, one would type make clean and all the .o files would be removed from the directory (*.o is a system defined macro).

EXAMPLE:
clean:
[tab] rm *.o

Check the Example Makefiles for explanations of specific and commonly used macros.

S. M. Garver, Spring 1998